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Conception de circuits condensateurs commutés multirats à très haute fréquence : extension t-
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- Achat immédiatConception de circuits condensateurs commutés multirats à très haute fréquence : extension t
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Numéro de l'objet eBay :395144537161
Dernière mise à jour le 22 sept. 2024 13:06:02 Paris. Afficher toutes les modificationsAfficher toutes les modifications
Caractéristiques de l'objet
- État
- ISBN-13
- 9781441938671
- Book Title
- Design of Very High-Frequency Multirate Switched-Capacitor Circui
- ISBN
- 9781441938671
- Subject Area
- Technology & Engineering
- Publication Name
- Design of Very High-Frequency Multirate Switched-Capacitor Circuits : Extending the Boundaries of CMOS Analog Front-End Filtering
- Publisher
- Springer
- Item Length
- 9.4 in
- Subject
- Electronics / Circuits / General, Electrical, Electronics / General
- Publication Year
- 2010
- Series
- The Springer International Series in Engineering and Computer Science Ser.
- Type
- Textbook
- Format
- Trade Paperback
- Language
- English
- Item Weight
- 16 Oz
- Item Width
- 6.3 in
- Number of Pages
- Xxxii, 228 Pages
À propos de ce produit
Product Identifiers
Publisher
Springer
ISBN-10
1441938672
ISBN-13
9781441938671
eBay Product ID (ePID)
99431734
Product Key Features
Number of Pages
Xxxii, 228 Pages
Language
English
Publication Name
Design of Very High-Frequency Multirate Switched-Capacitor Circuits : Extending the Boundaries of CMOS Analog Front-End Filtering
Publication Year
2010
Subject
Electronics / Circuits / General, Electrical, Electronics / General
Type
Textbook
Subject Area
Technology & Engineering
Series
The Springer International Series in Engineering and Computer Science Ser.
Format
Trade Paperback
Dimensions
Item Weight
16 Oz
Item Length
9.4 in
Item Width
6.3 in
Additional Product Features
Intended Audience
Scholarly & Professional
Dewey Edition
22
Series Volume Number
867
Number of Volumes
1 vol.
Illustrated
Yes
Dewey Decimal
621.39
Table Of Content
Improved Multirate Polyphase-Based Interpolation Structures.- Practical Multirate SC Circuit Design Considerations.- Gain- and Offset- Compensation for Multirate SC Circuits.- Design of a 108 MHz Multistage SC Video Interpolating Filter.- Design of a 320 MHz Frequency-Translated SC Bandpass Interpolating Filter.- Experimental Results.- Conclusions.
Synopsis
Design of Very High-Frequency Multirate Switched-Capacitor Circuits presents the theory and the corresponding CMOS implementation of the novel multirate sampled-data analog interpolation technique which has its great potential on very high-frequency analog frond-end filtering due to its inherent dual advantage of reducing the speed of data-converters and DSP core together with the specification relaxation of the post continuous-time filtering. This technique completely eliminates the traditional phenomenon of sampled-and-hold frequency-shaping at the lower input sampling rate. Also, in order to tackle physical IC imperfections at very high frequency, the state-of-the-art circuit design and layout techniques for high-speed Switched-Capacitor (SC) circuits are comprehensively discussed: -Optimum circuit architecture tradeoff analysis -Simple speed and power trade-off analysis of active elements -High-order filtering response accuracy with respect to capacitor-ratio mismatches -Time-interleaved effect with respect to gain and offset mismatch -Time-interleaved effect with respect to timing-skew and random jitter with non-uniformly holding -Stage noise analysis and allocation scheme -Substrate and supply noise reduction -Gain-and offset-compensation techniques -High-bandwidth low-power amplifier design and layout -Very low timing-skew multiphase generation Two tailor-made optimum design examples in CMOS are presented. The first one achieves a 3-stage 8-fold SC interpolating filter with 5.5MHz bandwidth and 108MHz output sampling rate for a NTSC/PAL CCIR 601 digital video at 3 V. Another is a 15-tap 57MHz SC FIR bandpass interpolating filter with 4-fold sampling rate increase to 320MHz and the first-time embedded frequency band up-translation for DDFS system at 2.5V. The corresponding chip prototype achieves so far the highest operating frequency, highest filter order and highest center frequency with highest dynamic range under the lowest supply voltage when compared to the previously reported high-frequency SC filters in CMOS., Design of Very High-Frequency Multirate Switched-Capacitor Circuits presents the theory and the corresponding CMOS implementation of the novel multirate sampled-data analog interpolation technique which has its great potential on very high-frequency analog frond-end filtering due to its inherent dual advantage of reducing the speed of data-converters and DSP core together with the specification relaxation of the post continuous-time filtering. This technique completely eliminates the traditional phenomenon of sampled-and-hold frequency-shaping at the lower input sampling rate. Also, in order to tackle physical IC imperfections at very high frequency, the state-of-the-art circuit design and layout techniques for high-speed Switched-Capacitor (SC) circuits are comprehensively discussed: -Optimum circuit architecture tradeoff analysis -Simple speed and power trade-off analysis of active elements -High-order filtering response accuracy with respect to capacitor-ratio mismatches -Time-interleaved effect with respect to gain and offset mismatch -Time-interleaved effect with respect to timing-skew and random jitter with non-uniformly holding -Stage noise analysis and allocation scheme -Substrate and supply noise reduction -Gain-and offset-compensation techniques -High-bandwidth low-power amplifier design and layout -Very low timing-skew multiphase generation Two tailor-made optimum design examples in CMOS are presented. The first one achieves a 3-stage 8-fold SC interpolating filter with 5.5MHz bandwidth and 108MHz output sampling rate for a NTSC/PAL CCIR 601 digital video at 3 V. Another is a 15-tap 57MHz SC FIR bandpass interpolating filter with 4-fold sampling rate increase to 320MHz and the first-time embedded frequency band up-translation for DDFS system at 2.5V. The corresponding chip prototype achieves so far the highest operating frequency, highest filter order and highest center frequency with highestdynamic range under the lowest supply voltage when compared to the previously reported high-frequency SC filters in CMOS.
LC Classification Number
TK7800-8360
Description de l'objet fournie par le vendeur
Informations sur le vendeur professionnel
Premier Books LLC
David Taylor
26C Trolley Sq
19806-3356 Wilmington, DE
United States
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- l***c (227)- Évaluations laissées par l'acheteur.Dernier moisAchat vérifiéBook came packaged well to avoid damage, in great condition. Not sure if the seller delayed shipping or if usps didn’t update the shipping, which is highly likely. Still received and we are happy with our purchase. I had trouble looking up tracking due to the company they used but seller found usps tracking and sent that over quickly. Sellers communication was excellent. Would buy from again. Item as described.
- t***n (2908)- Évaluations laissées par l'acheteur.Dernier moisAchat vérifiéI don't give negatives; However, description was not correct; No price guide was included in this book.As you will see in book pic shown; title states price guide included, no price guide inside. Communication poor, description, no communication price guide missing from this book. Shipping time was weeks before it was even shipped. Blamed the shipping on warehouse. You own & operate a business; your warehouse is not up to standards you change who you do business with. It's your responsibility.
- -***6 (133)- Évaluations laissées par l'acheteur.6 derniers moisAchat vérifiéItem arrived as described and adequately packaged. Ridiculously long shipping time. Seller posts incorrect tracking number and lists the item as shipped. Contacted seller for correct tracking, received a new tracking number with the warning that the number won’t be “live” until the item is shipped. Will you get your item? Yeah, probably. Count on it being delivered 2-3 weeks longer than expected.
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